DV164136 Microchip Technology, DV164136 Datasheet - Page 132

• Manufacturer Part Number: DV164136
• Description: DEVELOPMENT KIT FOR PIC18
• Manufacturer: Microchip Technology
• Series: PIC®r
• Type: MCUr

Specifications of DV164136

• Contents: Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
• Processor To Be Evaluated: PIC18F8722, PIC18F87J11
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V, 5 V
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18F8xxx
• Kit Contents: PIC18 Exp Brd PICkit 3 Cable CD PSU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PIC18F8722, PIC18F87J11
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F8722 FAMILY
10.4
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Priority registers (IPR1, IPR2, IPR3). Using
the priority bits requires that the Interrupt Priority
Enable (IPEN) bit be set.
REGISTER 10-10: IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
DS39646C-page 130
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PSPIP
R/W-1
IPR Registers
PSPIP: Parallel Slave Port Read/Write Interrupt Priority bit
1 = High priority
0 = Low priority
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
RC1IP: EUSART1 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX1IP: EUSART1 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
SSP1IP: MSSP1 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP1IP: ECCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
ADIP
W = Writable bit
‘1’ = Bit is set
RC1IP
R/W-1
R/W-1
TX1IP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSP1IP
R/W-1
CCP1IP
R/W-1
© 2008 Microchip Technology Inc.
x = Bit is unknown
TMR2IP
R/W-1
TMR1IP
R/W-1
bit 0