DV164136 Microchip Technology, DV164136 Datasheet - Page 319
![DEVELOPMENT KIT FOR PIC18](/photos/9/21/92129/dv164136_sml.jpg)
DV164136
Manufacturer Part Number
DV164136
Description
DEVELOPMENT KIT FOR PIC18
Manufacturer
Microchip Technology
Series
PIC®r
Type
MCUr
Datasheets
1.DM183032.pdf
(38 pages)
2.DV164136.pdf
(448 pages)
3.DV164136.pdf
(6 pages)
4.DV164136.pdf
(446 pages)
5.DV164136.pdf
(4 pages)
6.DV164136.pdf
(18 pages)
Specifications of DV164136
Contents
Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
Processor To Be Evaluated
PIC18F8722, PIC18F87J11
Interface Type
RS-232, USB
Operating Supply Voltage
3.3 V, 5 V
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC18
Silicon Core Number
PIC18F
Silicon Family Name
PIC18F8xxx
Kit Contents
PIC18 Exp Brd PICkit 3 Cable CD PSU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
PIC18F8722, PIC18F87J11
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DV164136
Manufacturer:
MICROCHIP
Quantity:
12 000
- DM183032 PDF datasheet
- DV164136 PDF datasheet #2
- DV164136 PDF datasheet #3
- DV164136 PDF datasheet #4
- DV164136 PDF datasheet #5
- DV164136 PDF datasheet #6
- Current page: 319 of 446
- Download datasheet (7Mb)
25.5
The user program memory is divided into four blocks
for
PIC18F6622/8622 devices, six blocks for PIC18F6627/
8627 devices and eight blocks for PIC18F6722/8722
devices. One of these is a boot block of 2, 4 or
8 Kbytes. The remainder of the memory is divided into
blocks on binary boundaries.
FIGURE 25-5:
© 2008 Microchip Technology Inc.
Note:
000000h
01FFFFh
200000h
3FFFFFh
PIC18F6527/8527
*
Sizes of memory areas are not to scale.
Boot block size is determined by the BBSIZ<1:0> bits in CONFIG4L.
Program Verification and
Code Protection
Unimplemented
Code Memory
Configuration
Read as ‘
and ID
Space
CODE-PROTECTED PROGRAM MEMORY FOR THE PIC18F8722 FAMILY
0
’
devices,
five
(PIC18FX722)
128 Kbytes
Boot Block
Block 0
Block 1
Block 2
Block 3
Block 4
Block 5
Block 6
Block 7
blocks
for
Unimplemented
(PIC18FX627)
96 Kbytes
Boot Block
Read ‘
Block 0
Block 1
Block 2
Block 3
Block 4
Block 5
0
Each of the blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPn)
• Write-Protect bit (WRTn)
• External Block Table Read bit (EBTRn)
Figure 25-5 shows the program memory organization for
48, 64, 96 and 128-Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 25-3.
PIC18F8722 FAMILY
’s
MEMORY SIZE/DEVICE
Unimplemented
(PIC18FX622)
64 Kbytes
Boot Block
Read ‘
Block 0
Block 1
Block 2
Block 3
0
’s
Unimplemented
(PIC18FX527)
Boot Block
48 Kbytes
Read ‘
Block 0
Block 1
Block 2
0
’s
DS39646C-page 317
000000h
0007FFh* or
000FFFh* or
001FFFh*
000800h* or
001000h* or
002000h*
003FFFh
004000h
007FFFh
008000h
00BFFFh
00C000h
00FFFFh
010000h
013FFFh
014000h
017FFFh
018000h
01BFFFh
01C000h
01FFFFh
Address
Range
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