DV164136 Microchip Technology, DV164136 Datasheet - Page 249

• Manufacturer Part Number: DV164136
• Description: DEVELOPMENT KIT FOR PIC18
• Manufacturer: Microchip Technology
• Series: PIC®r
• Type: MCUr

Specifications of DV164136

• Contents: Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
• Processor To Be Evaluated: PIC18F8722, PIC18F87J11
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V, 5 V
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18F8xxx
• Kit Contents: PIC18 Exp Brd PICkit 3 Cable CD PSU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PIC18F8722, PIC18F87J11
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.0
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of two
serial I/O modules. (Generically, the USART is also
known as a Serial Communications Interface or SCI.)
The EUSART can be configured as a full-duplex
asynchronous system that can communicate with
peripheral devices, such as CRT terminals and
personal computers. It can also be configured as a half-
duplex synchronous system that can communicate
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs, etc.
The Enhanced USART module implements additional
features, including automatic baud rate detection and
calibration, automatic wake-up on Sync Break recep-
tion and 12-bit Break Character transmit. These make
it ideally suited for use in Local Interconnect Network
bus (LIN bus) systems.
The EUSART can be configured in the following
modes:
• Asynchronous (full duplex) with:
• Synchronous – Master (half duplex) with
• Synchronous – Slave (half duplex) with
© 2008 Microchip Technology Inc.
- Auto-Wake-up on Character Reception
- Auto-Baud Calibration
- 12-bit Break Character Transmission
Selectable Clock Polarity
Selectable Clock Polarity
ENHANCED UNIVERSAL
SYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
The pins of EUSART1 and EUSART2 are multiplexed
with the functions of PORTC (RC6/TX1/CK1 and RC7/
RX1/DT1) and PORTG (RG1/TX2/CK2 and RG2/RX2/
DT2), respectively. In order to configure these pins as
an EUSART:
• For EUSART1:
• For EUSART2:
The operation of each Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTAx)
• Receive Status and Control (RCSTAx)
• Baud Rate Control (BAUDCONx)
These are detailed on the following pages in
Register 20-1,
respectively.
PIC18F8722 FAMILY
- bit SPEN (RCSTA1<7>) must be set (= 1)
- bit TRISC<7> must be set (= 1)
- bit TRISC<6> must be cleared (= 0) for
- bit TRISC<6> must be set (= 1) for
- bit SPEN (RCSTA2<7>) must be set (= 1)
- bit TRISG<2> must be set (= 1)
- bit TRISG<1> must be cleared (= 0) for
- bit TRISC<6> must be set (= 1) for
Note:
Note:
Asynchronous and Synchronous Master
modes
Synchronous Slave mode
Asynchronous and Synchronous Master
modes
Synchronous Slave mode
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Throughout this section, references to
register and bit names that may be associ-
ated with a specific EUSART module are
referred to generically by the use of ‘x’ in
place of the specific module number.
Thus, “RCSTAx” might refer to the
Receive
EUSART1 or EUSART2
Register 20-2
Status
register
and
DS39646C-page 247
Register 20-3,
for
either