Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 86

ADAPTER ICE Z8 ENCORE 64K 64LQFP

Z8F64220100ZDA

Manufacturer Part Number
Z8F64220100ZDA
Description
ADAPTER ICE Z8 ENCORE 64K 64LQFP
Manufacturer
Zilog
Datasheets

Specifications of Z8F64220100ZDA

Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3403
Table 31. IRQ1 Enable High Bit Register (IRQ1ENH)
Table 32. IRQ1 Enable Low Bit Register (IRQ1ENL)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
IRQ2 Enable High and Low Bit Registers
PAD7ENH PAD6ENH PAD5ENH PAD4ENH PAD3ENH PAD2ENH PAD1ENH PAD0ENH
PAD7ENL PAD6ENL PAD5ENL PAD4ENL PAD3ENL PAD2ENL PAD1ENL PAD0ENL
R/W
R/W
7
0
7
0
PADxENH—Port A or Port D Bit[x] Interrupt Request Enable High Bit.
For selection of either Port A or Port D as the interrupt source, see
Register
PADxENL—Port A or Port D Bit[x] Interrupt Request Enable Low Bit
For selection of either Port A or Port D as the interrupt source, see
Register
The IRQ2 Enable High and Low Bit registers (see
a priority encoded enabling for interrupts in the Interrupt Request 2 register. Priority is
generated by setting bits in each register.
Table 33. IRQ2 Enable and Priority Encoding
IRQ2ENH[x] IRQ2ENL[x]
0
0
1
on page 74.
on page 74.
R/W
R/W
6
0
6
0
0
1
0
R/W
R/W
5
0
5
0
Disabled
Priority
R/W
R/W
Level 1
Level 2
4
0
4
0
FC4H
FC5H
Table 33
R/W
R/W
3
0
3
0
Description
Disabled
Nominal
Table 34
describes the priority control for IRQ2.
Low
Z8 Encore! XP
R/W
R/W
and
2
0
2
0
Table 35
Product Specification
Interrupt Port Select
Interrupt Port Select
R/W
R/W
1
0
1
0
®
on page 73) form
Interrupt Controller
F64XX Series
R/W
R/W
0
0
0
0
72

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