Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 85

ADAPTER ICE Z8 ENCORE 64K 64LQFP

Z8F64220100ZDA

Manufacturer Part Number
Z8F64220100ZDA
Description
ADAPTER ICE Z8 ENCORE 64K 64LQFP
Manufacturer
Zilog
Datasheets

Specifications of Z8F64220100ZDA

Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3403
Table 29. IRQ0 Enable Low Bit Register (IRQ0ENL)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
IRQ1 Enable High and Low Bit Registers
T2ENL
7
T2ENL—Timer 2 Interrupt Request Enable Low Bit
T1ENL—Timer 1 Interrupt Request Enable Low Bit
T0ENL—Timer 0 Interrupt Request Enable Low Bit
U0RENL—UART 0 Receive Interrupt Request Enable Low Bit
U0TENL—UART 0 Transmit Interrupt Request Enable Low Bit
I2CENL—I
SPIENL—SPI Interrupt Request Enable Low Bit
ADCENL—ADC Interrupt Request Enable Low Bit
The IRQ1 Enable High and Low Bit registers (see
a priority encoded enabling for interrupts in the Interrupt Request 1 register. Priority is
generated by setting bits in each register.
Table 30. IRQ1 Enable and Priority Encoding
Note: where x indicates the register bits from 0 through 7.
IRQ1ENH[x] IRQ1ENL[x]
0
0
1
1
T1ENL
6
2
C Interrupt Request Enable Low Bit
T0ENL
0
1
0
1
5
U0RENL
Disabled
Priority
Level 1
Level 2
Level 3
4
FC2H
R/W
Table 30
0
U0TENL
3
Description
Disabled
Nominal
Table 31
describes the priority control for IRQ1.
High
Low
Z8 Encore! XP
I2CENL
and
2
Table 32
Product Specification
SPIENL
1
®
on page 72) form
Interrupt Controller
F64XX Series
ADCENL
0
71

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