Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 50

ADAPTER ICE Z8 ENCORE 64K 64LQFP

Z8F64220100ZDA

Manufacturer Part Number
Z8F64220100ZDA
Description
ADAPTER ICE Z8 ENCORE 64K 64LQFP
Manufacturer
Zilog
Datasheets

Specifications of Z8F64220100ZDA

Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3403
DMA0 Control
DMA0CTL (FB0H - Read/Write)
DMA0 I/O Address
DMA0IO (FB1H - Read/Write)
PS019921-0308
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Request Trigger Source Select
000 = Timer 0
001 = Timer 1
010 = Timer 2
011 = Timer 3
100 = UART0 Received Data
register
101 = UART1 Received Data
register
110 = I2C receiver contains valid
data
111 = Reserved
Word Select
0 = DMA transfers 1 byte per
request
1 = DMA transfers 2 bytes per
request
DMA0 Interrupt Enable
0 = DMA0 does not generate
interrupts
1 = DMA0 generates an interrupt
when
DMA0 Data Transfer Direction
0 = Register File to peripheral
registers
1 = Peripheral registers to Register
File
DMA0 Loop Enable
0 = DMA disables after End Address
1 = DMA reloads Start Address after
run
DMA0 Enable
0 = DMA0 is disabled
1 = DMA0 is enabled
DMA0 Peripheral Register Address
control
Low byte of on-chip peripheral
registers on Register File page FH
End Address data is transferred
End Address and continues to
contains valid data
contains valid data
DMA0 Address High Nibble
DMA0H (FB2H - Read/Write)
DMA0 Start/Current Address Low Byte
DMA0START (FB3H - Read/Write)
DMA0 End Address Low Byte
DMA0END (FB4H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Z8 Encore! XP
DMA0 Start Address [11:8]
DMA0 End Address [11:8]
DMA0 Start Address [7:0]
DMA0 End Address [7:0]
Product Specification
Control Register Summary
®
F64XX Series
36

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