Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 190

ADAPTER ICE Z8 ENCORE 64K 64LQFP

Z8F64220100ZDA

Manufacturer Part Number
Z8F64220100ZDA
Description
ADAPTER ICE Z8 ENCORE 64K 64LQFP
Manufacturer
Zilog
Datasheets

Specifications of Z8F64220100ZDA

Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3403
Table 87. ADC Data High Byte Register (ADCD_H)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
ADC Data High Byte Register
ADC Data Low Bits Register
7
0101 = ANA5
0110 = ANA6
0111 = ANA7
1000 = ANA8
1001 = ANA9
1010 = ANA10
1011 = ANA11
11XX = Reserved.
The ADC Data High Byte register
ADC output. During a single-shot conversion, this value is invalid. Access to the ADC
Data High Byte register is read-only. The full 10-bit ADC result is given by
{ADCD_H[7:0], ADCD_L[7:6]}. Reading the ADC Data High Byte register latches data
in the ADC Low Bits register.
ADCD_H—ADC Data High Byte
This byte contains the upper eight bits of the 10-bit ADC output. These bits are not valid
during a single-shot conversion. During a continuous conversion, the last conversion out-
put is held in this register. These bits are undefined after a Reset.
The ADC Data Low Bits register
value. The data in the ADC Data Low Bits register is latched each time the ADC Data
High Byte register is read. Reading this register always returns the lower two bits of the
conversion last read into the ADC High Byte register. Access to the ADC Data Low Bits
register is read-only. The full 10-bit ADC result is given by {ADCD_H[7:0],
ADCD_L[7:6]}.
6
5
(Table
(Table
4
ADCD_H
F72H
88) contains the lower two bits of the conversion
R
X
87) contains the upper eight bits of the 10-bit
3
Z8 Encore! XP
2
Product Specification
Analog-to-Digital Converter
1
®
F64XX Series
0
176

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