Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 117

ADAPTER ICE Z8 ENCORE 64K 64LQFP

Z8F64220100ZDA

Manufacturer Part Number
Z8F64220100ZDA
Description
ADAPTER ICE Z8 ENCORE 64K 64LQFP
Manufacturer
Zilog
Datasheets

Specifications of Z8F64220100ZDA

Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3403
PS019921-0308
Receiving Data using the Polled Method
8. Execute an EI instruction to enable interrupts.
The UART is now configured for interrupt-driven data transmission. Because the UART
Transmit Data register is empty, an interrupt is generated immediately. When the UART
Transmit interrupt is detected, the associated interrupt service routine performs the follow-
ing:
1. Write the UART Control 1 register to select the outgoing address bit:
2. Write the data byte to the UART Transmit Data register. The transmitter automatically
3. Clear the UART Transmit interrupt bit in the applicable Interrupt Request register.
4. Execute the IRET instruction to return from the interrupt-service routine and wait for
Follow the steps below to configure the UART for polled data reception:
1. Write to the UART Baud Rate High and Low Byte registers to set the desired baud
2. Enable the UART pin functions by configuring the associated GPIO Port pins for
3. Write to the UART Control 1 register to enable MULTIPROCESSOR mode functions,
4. Write to the UART Control 0 register to:
5. Check the RDA bit in the UART Status 0 register to determine if the Receive Data
6. Read data from the UART Receive Data register. If operating in MULTIPROCESSOR
7. Return to
transfers the data to the Transmit Shift register and transmits the data.
the Transmit Data register to again become empty.
rate.
alternate function operation.
if desired.
register contains a valid data byte (indicated by a 1). If RDA is set to 1 to indicate
available data, continue to
0), continue to monitor the RDA bit awaiting reception of the valid data.
(9-bit) mode, further actions may be required depending on the MULTIPROCESSOR
Mode bits MPMD[1:0].
Set the MULTIPROCESSOR Bit Transmitter (MPBT) if sending an address byte,
clear it if sending a data byte.
Set the receive enable bit (REN) to enable the UART for data reception.
Enable parity, if desired and if MULTIPROCESSOR mode is not enabled, and
select either even or odd parity.
step 5
to receive additional data.
step
6. If the Receive Data register is empty (indicated by a
Z8 Encore! XP
Product Specification
®
F64XX Series
UART
103

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