APMOTOR56F8000E Freescale Semiconductor, APMOTOR56F8000E Datasheet - Page 21

KIT DEMO MOTOR CTRL SYSTEM

APMOTOR56F8000E

Manufacturer Part Number
APMOTOR56F8000E
Description
KIT DEMO MOTOR CTRL SYSTEM
Manufacturer
Freescale Semiconductor
Type
Motor / Motion Controllers & Driversr

Specifications of APMOTOR56F8000E

Accessory Type
Motor Controller
Input Voltage
9 V
Interface Type
RS-232
Product
Power Management Modules
For Use With/related Products
DEMO56F8013, DEMO56F8013-E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
Table 2-3 56F8014 Signal and Package Information for the 32-Pin LQFP (Continued)
3. This signal is also brought out on the GPIOB7 pin.
4. This signal is also brought out on the GPIOB6 pin.
Return to
(GPIOD1)
GPIOB0
GPIOB1
(SCLK)
(SDA
Signal
(SCL
Name
TDO
(SS)
3
4
)
)
Table 2-2
Pin No.
LQFP
31
21
1
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
State During
Input with
Input with
enabled
enabled
internal
internal
Output
pull-up
pull-up
Reset
56F8014 Technical Data, Rev. 11
Test Data Output — This tri-stateable output pin provides a serial
output data stream from the JTAG/EOnCE port. It is driven in the
shift-IR and shift-DR controller states, and changes on the falling
edge of TCK.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDO.
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SPI Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as
the data clock input. A Schmitt trigger input is used for noise
immunity.
Serial Data — This pin serves as the I
After reset, the default state is GPIOB0. The alternative peripheral
functionality is controlled via the SIM. See
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SPI Slave Select — SS is used in slave mode to indicate to the SPI
module that the current transfer is to be received.
Serial Clock — This pin serves as the I
After reset, the default state is GPIOB1. The alternative peripheral
functionality is controlled via the SIM. See
Signal Description
2
C serial clock.
2
C serial data line.
Section
Section
6.3.8.
6.3.8.
56F8014 Signal Pins
21

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