MT46H8M16LFCF-10 Micron Technology Inc, MT46H8M16LFCF-10 Datasheet - Page 62

• Manufacturer Part Number: MT46H8M16LFCF-10
• Description: IC DDR SDRAM 128MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H8M16LFCF-10

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 60-VFBGA
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 15b
• Access Time (max): 7ns
• Maximum Clock Rate: 104MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 90mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 40:
PDF: 09005aef822b7e27/Source: 09005aef822b7dd6
MT46H8M16LFB_2.fm - Rev. A 5/06 EN
Case 1:
Case 2:
COMMAND
BA0, BA1
A11, A12
A0–A9
t
t
AC
AC
DQS
DQ
DQS
DQ
CK#
CKE
A10
DM
CK
(MIN)
(MAX)
5
1
1
and
and
Bank Read – With Auto Precharge
t
t
IS
IS
NOP 6
t
T0
DQSCK
t
DQSCK
t
Notes:
t
IH
IH
(MIN)
(MAX)
Bank x
t
t
IS
IS
1. D
2. BL = 4 in the case shown.
3. Enable auto precharge.
4. PRE = PRECHARGE, ACT = ACTIVE, RA = Row address, BA = Bank address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these
6. Refer to Figure 32 on page 55 and Figure 33 on page 56 for detailed DQS and DQ timing.
ACT
RA
RA
T1
RA
t
t
times.
IH
IH
t
OUT
CK
t
t
n = data-out from column n.
RAS
RCD
t
RC
NOP 6
T2
t
CH
t
CL
t
3
Bank x
IS
READ 2
Col n
T3
t
IH
62
NOP 6
T4
128Mb: 8 Meg x 16 Mobile DDR SDRAM
t
LZ
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CL = 3
CL = 3
(MIN)
t
LZ
(MAX)
NOP
T5
t
AC
6
t
t
RPRE
AC
(MIN)
T5n
t
(MAX)
RPRE
t
RP
D
OUT
n
NOP 6
DON’T CARE
T6
D
OUT
n
t
t
DQSCK
DQSCK
Dout
n + 1
T6n
©2006 Micron Technology, Inc. All rights reserved.
D
n + 1
OUT
(MIN)
(MAX)
Timing Diagrams
D
n + 2
OUT
NOP 6
T7
D
n + 2
OUT
TRANSITIONING DATA
t
HZ
t
D
RPST
n + 3
t
HZ
OUT
(MIN)
t
D
n + 3
RPST
(MAX)
OUT
Bank x
ACT
T8
RA
RA
RA
Advance