MT46H8M16LFCF-10 Micron Technology Inc, MT46H8M16LFCF-10 Datasheet - Page 41

IC DDR SDRAM 128MBIT 60VFBGA

MT46H8M16LFCF-10

Manufacturer Part Number
MT46H8M16LFCF-10
Description
IC DDR SDRAM 128MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheets

Specifications of MT46H8M16LFCF-10

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
60-VFBGA
Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
7ns
Maximum Clock Rate
104MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
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Quantity
Price
Part Number:
MT46H8M16LFCF-10
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 IT
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 IT TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Power-Down (Active or Precharge)
Figure 29:
PDF: 09005aef822b7e27/Source: 09005aef822b7dd6
MT46H8M16LFB_2.fm - Rev. A 5/06 EN
Power-Down Command (Active or Precharge)
Note:
Power-down (see Figure 30) is entered when CKE is registered LOW. If power-down
occurs when all banks are idle, this mode is referred to as precharge power-down; if
power-down occurs when there is a row active in any bank, this mode is referred to as
active power-down. Entering power-down deactivates the input and output buffers,
including CK and CK#. Exiting power-down requires the device to be at the same voltage
as when it entered power-down and a stable clock.
While in power-down, CKE LOW must be maintained at the inputs of the Mobile DDR
SDRAM, while all other input signals are “Don’t Care.” The power-down state is
synchronously exited when CKE is registered HIGH (in conjunction with a NOP or
DESELECT command). NOP or DESELECT commands must be maintained on the
command bus until
RAS#, CAS#, WE#
RAS#, CAS#, WE#
The power-down duration is limited by the refresh requirements of the device.
BA0–BA1
A0–A11
CKE
CK#
CS#
CS#
CK
t
PDX is satisfied.
BA0,1
DON’T CARE
OR
41
128Mb: 8 Meg x 16 Mobile DDR SDRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.
Operations
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