MT46H8M16LFCF-10 Micron Technology Inc, MT46H8M16LFCF-10 Datasheet - Page 50

• Manufacturer Part Number: MT46H8M16LFCF-10
• Description: IC DDR SDRAM 128MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H8M16LFCF-10

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 60-VFBGA
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 15b
• Access Time (max): 7ns
• Maximum Clock Rate: 104MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 90mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 16:
PDF: 09005aef822b7e27/Source: 09005aef822b7dd6
MT46H8M16LFB_2.fm - Rev. A 5/06 EN
AC Characteristics
Parameter
Access window of DQs from CK/CK#
CK high-level width
CK low-level width
Clock cycle time
Auto precharge write recovery + precharge time
DQ and DM input hold time relative to DQS
DQ and DM input setup time relative to DQS
DQ and DM input pulse width (for each input)
Access window of DQS from CK/CK#
DQS input high-pulse width
DQS input low-pulse width
DQS-DQ skew, DQS to last DQ valid, per group,
per access
WRITE command to first DQS latching transition
DQS falling edge to CK rising – setup time
DQS falling edge from CK rising – hold time
Half-clock period
Data-out High-Z window from CK/CK#
Data-out Low-Z window from CK/CK#
Address and control input hold time
(fast slew rate)
Address and control input setup time
(fast slew rate)
Address and control input hold time
(slow slew rate)
Address and control input setup time
(slow slew rate)
Address and control input pulse width
LOAD MODE REGISTER command cycle time
DQ–DQS hold, DQS to first DQ to go non-valid,
per access
Data hold skew factor
ACTIVE-to-PRECHARGE command
ACTIVE-to-ACTIVE/AUTO REFRESH command
period
AUTO REFRESH command period
ACTIVE-to-READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
Electrical Characteristics and Recommended AC Operating Conditions
Notes: 1–6, 27; notes appear on pages 52–54; V
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
Symbol
t
t
t
RPRE(3)
RPRE(2)
t
t
DQSCK
t
t
t
t
t
t
t
t
t
DQSH
DQSQ
AC(3)
AC(2)
DIPW
t
t
t
t
CK(3)
CK(2)
t
DQSL
DQSS
t
t
t
MRD
t
RPST
t
t
t
t
QHS
t
DAL
DSH
t
t
RCD
RRD
t
t
t
t
IPW
RAS
t
t
DSS
t
RFC
QH
DH
IH
IH
CH
DS
HP
HZ
RC
CL
IS
IS
RP
LZ
F
S
F
S
50
DD
t
CH,
Q = +1.8 ±0.1V, V
-
Min
0.45
0.45
0.75
0.75
t
97.5
22.5
22.5
0.75
t
2.5
2.0
7.5
2.5
0.4
0.4
0.2
0.2
1.0
1.3
1.3
1.5
1.5
3.0
QHS
0.9
0.5
0.4
12
45
75
15
HP
–
2
–
–
–
t
t
DS +
128Mb: 8 Meg x 16 Mobile DDR SDRAM
CL
-75
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
DH
70,000
Max
0.55
0.55
1.25
0.75
6.0
6.5
6.0
0.6
0.6
0.6
6.0
1.1
1.1
0.6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
DD
t
CH,
-
= +1.8 ±0.1V
Min
0.45
0.45
0.75
t
t
2.0
2.0
9.6
1.1
1.1
2.5
0.4
0.4
0.2
0.2
1.0
1.5
1.5
1.7
1.7
3.4
0.9
0.5
0.4
QHS
15
50
80
80
30
30
15
HP
–
–
–
2
–
t
DS +
t
CL
Electrical Specifications
-10
t
DH
70,000
Max
0.55
0.55
1.25
7.0
7.0
7.0
0.6
0.6
0.7
7.0
1.1
1.1
0.6
©2006 Micron Technology, Inc. All rights reserved.
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1
–
–
–
–
–
Units
t
t
t
t
t
t
t
t
t
t
t
ns
CK
CK
ns
ns
ns
ns
ns
CK
CK
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
CK
ns
ns
ns
ns
ns
ns
ns
CK
CK
CK
ns
23, 28, 40
23, 28, 40
Notes
Advance
22, 23
15, 34
15, 34
14, 40
14, 40
14, 40
14, 40
22, 23
41
42
29
42
30
38
34
34
7