MT46H8M16LFCF-10 Micron Technology Inc, MT46H8M16LFCF-10 Datasheet - Page 42

• Manufacturer Part Number: MT46H8M16LFCF-10
• Description: IC DDR SDRAM 128MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H8M16LFCF-10

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 60-VFBGA
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 15b
• Access Time (max): 7ns
• Maximum Clock Rate: 104MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 90mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 30:
Truth Tables
Table 9:
PDF: 09005aef822b7e27/Source: 09005aef822b7dd6
MT46H8M16LFB_2.fm - Rev. A 5/06 EN
CKE
H
H
H
H
H
L
L
L
L
L
L
n-1
CKE
H
H
H
H
H
L
L
L
L
L
L
Truth Table – CKE
Notes: 1–5
Power-Down (Active or Precharge)
n
Referencing
Referencing
(Precharge) Power-Down
(Precharge) Power-Down
Notes:
Notes:
(Active) Power-Down
(Active) Power-Down
COMMAND
COMMAND
Current State
Bank(s) active
All banks idle
All banks idle
Self refresh
Self refresh
CKE
CKE
CK#
t
t
CKE and
PDEX
CK
No READ/WRITE
access in progress
1. Clock must toggle a minimum of once during this time.
1. CKE
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMAND
4. All states and sequences not shown are illegal or reserved.
5.
6. DESELECT or NOP commands should be issued on any clock edges occurring during the
7. The clock must toggle at least once during the
8. DESELECT or NOP commands should be issued on any clock edges occurring during the
9. The clock must toggle at least once during the
edge.
COMMAND
t
period.
period.
CKE pertains.
t
XP
VALID
VALID
T0
n
is the logic state of CKE at clock edge n
n
n
t
t
.
IS
IS
NOP
NOP
is the command registered at clock edge n
T1
Enter
(active or precharge) power-down mode
See Table 11 on page 45
See Table 11 on page 45
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
COMMAND
T2
(
(
(
(
(
(
)
(
)
(
)
)
)
)
)
)
(
(
(
(
(
(
)
)
(
)
)
(
)
)
)
)
X
X
X
42
n
Ta0
128Mb: 8 Meg x 16 Mobile DDR SDRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
; CKE
NOP
NOP
Ta1
Maintain (precharge) power-down
Exit
(active or precharge) power-down mode
t
t
t
PDX period.
XSR period.
(Precharge) power-down entry
n-1
PDEX
Maintain (active) power-down
Exit (precharge) power-down
(Active) power-down entry
Exit (active) power-down
was the state of CKE at the previous clock
Maintain self refresh
,
and ACTION
Self refresh entry
Exit self refresh
VALID
t
t
Ta2
CKE
NOP
XP
1
ACTION
DON’T CARE
©2006 Micron Technology, Inc. All rights reserved.
t
IS
VALID
n
n
Ta3
NOP
is a
result of
Truth Tables
Advance
Notes
6, 7
6, 7
8, 9
t
t
PDX
XSR