H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 425
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
- Current page: 425 of 559
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Bit
2
1
Bit Name Initial Value Slave Host Description
IRQ10E2 0
IRQ9E2
0
R/W
R/W
R/W
—
—
Host IRQ10 Interrupt Enable 2
Enables or disables a host IRQ10 interrupt request
when OBF2 is set by an ODR2 write.
0: Host IRQ10 interrupt request by OBF2 and
IRQ10E2 is disabled
[Clearing conditions]
1: [When IEDIR = 0]
[Setting condition]
Writing 1 after reading IRQ10E2 = 0
Host IRQ9 Interrupt Enable 2
Enables or disables a host IRQ9 interrupt request
when OBF2 is set by an ODR2 write.
0: Host IRQ9 interrupt request by OBF2 and IRQ9E2
is disabled
[Clearing conditions]
1: [When IEDIR = 0]
[Setting condition]
Writing 1 after reading IRQ9E2 = 0
Writing 0 to IRQ10E2
LPC hardware reset, LPC software reset
Clearing OBF2 to 0 (when IEDIR = 0)
Host IRQ10 interrupt request by setting OBF2 to
1 is enabled
[When IEDIR = 1]
Host IRQ10 interrupt is requested.
Writing 0 to IRQ9E2
LPC hardware reset, LPC software reset
Clearing OBF2 to 0 (when IEDIR = 0)
Host IRQ9 interrupt request by setting OBF2 to 1
is enabled
[When IEDIR = 1]
Host IRQ9 interrupt is requested.
Section 15 Host Interface LPC Interface (LPC)
Rev. 2.00 Mar 21, 2006 page 387 of 518
REJ09B0299-0200
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