H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 200

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 16-Bit Free-Running Timer (FRT)
If ICRA to ICRAD are read when the corresponding input capture signal arrives, the internal input
capture signal is delayed by one system clock ( ). Figure 9.8 shows the timing for this case.
9.5.5
ICRC and ICRD can operate as buffers for ICRA and ICRB, respectively. Figure 9.9 shows how
input capture operates when ICRC is used as ICRA's buffer register (BUFEA = 1) and IEDGA and
IEDGC are set to different values (IEDGA = 0 and IEDGC = 1, or IEDGA = 1 and IEDGC = 0),
so that input capture is performed on both the rising and falling edges of FTIA.
Rev. 2.00 Mar 21, 2006 page 162 of 518
REJ09B0299-0200
Figure 9.8 Input Capture Input Signal Timing (When ICRA to ICRD Are Read)
φ
FTIA
Input capture
signal
FRC
ICRA
ICRC
φ
Input capture
input pin
Input capture signal
Buffered Input Capture Input Timing
M
m
Figure 9.9 Buffered Input Capture Timing
n
M
n
n + 1
Read cycle of ICRA to ICRD
T 1
N
M
n
T 2
N
n
N + 1