H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 275
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
- Current page: 275 of 559
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12.3.10 Serial Pin Select Register (SPSR)
SPSR selects the serial I/O pins. SPSR should be set before initialization. Do not set during
communication.
Note: The program development tool (emulator) does not support SPSR.
12.4
Figure 12.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by transmit/receive data, a parity bit, and finally stop bits (high
level). In asynchronous serial communication, the transmission line is usually held in the mark
state (high level). The SCI monitors the transmission line, and when it goes to the space state (low
level), recognizes a start bit and starts serial communication. Inside the SCI, the transmitter and
receiver are independent units, enabling full-duplex communication. Both the transmitter and the
receiver also have a double-buffered structure, so that data can be read or written during
transmission or reception, enabling continuous data transfer and reception.
Bit
7
6 to 0
Bit Name
SPS1
—
Serial
data
Operation in Asynchronous Mode
1
Start
bit
1 bit
Figure 12.2 Data Format in Asynchronous Communication
0
Initial Value
0
All 0
LSB
D0
(Example with 8-Bit Data, Parity, Two Stop Bits)
One unit of transfer data (character or frame)
D1
D2
R/W
R/W
R/W
Transmit/receive data
D3
7 or 8 bits
D4
Description
Serial Port Select
Selects the serial I/O pins.
0: P86/SCK1, P85/RxD1, P84/TxD1
1: P52/ExSCK1, P51/ExRxD1, P50/ExTxD1
Reserved
The initial value should not be changed.
Section 12 Serial Communication Interface (SCI)
D5
D6
Rev. 2.00 Mar 21, 2006 page 237 of 518
MSB
D7
Parity
bit
1 bit or
none
0/1
Stop bit
1
1 or 2 bits
1
REJ09B0299-0200
(mark state)
Idle state
1
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