H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 107
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
- Current page: 107 of 559
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5.3.5
IER controls the enabling and disabling of interrupt requests IRQ7 to IRQ0.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
ISCRL
Bit Name
IRQ3SCB
IRQ3SCA
IRQ2SCB
IRQ2SCA
IRQ1SCB
IRQ1SCA
IRQ0SCB
IRQ0SCA
Bit Name
IRQ7E
IRQ6E
IRQ5E
IRQ4E
IRQ3E
IRQ2E
IRQ1E
IRQ0E
IRQ Enable Register (IER)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
IRQn Sense Control B
IRQn Sense Control A
00: Interrupt request generated at low level of
IRQn input
01: Interrupt request generated at falling edge
of IRQn input
10: Interrupt request generated at rising edge
of IRQn input
11: Interrupt request generated at both falling
and rising edges of IRQn input
(n = 3 to 0)
Description
IRQn Enable (n = 7 to 0)
The IRQn interrupt request is enabled when
this bit is 1.
Rev. 2.00 Mar 21, 2006 page 69 of 518
Section 5 Interrupt Controller
REJ09B0299-0200
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