H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 222

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 8-Bit Timer (TMR)
10.3.5
TCSR indicates the status flags and controls compare-match output.
TCSR_0
Bit
7
6
5
4
3
2
Rev. 2.00 Mar 21, 2006 page 184 of 518
REJ09B0299-0200
Bit Name Initial Value R/W
CMFB
CMFA
OVF
ADTE
OS3
OS2
Timer Control/Status Register (TCSR)
0
0
0
0
0
0
R/(W) * Compare-Match Flag B
R/(W) * Compare-Match Flag A
R/(W) * Timer Overflow Flag
R/W
R/W
R/W
Description
[Setting condition]
When the values of TCNT_0 and TCORB_0 match
[Clearing condition]
Read CMFB when CMFB = 1, then write 0 in CMFB
[Setting condition]
When the values of TCNT_0 and TCORA_0 match
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA
[Setting condition]
When TCNT_0 overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
A/D Trigger Enable
Enables or disables A/D converter start requests by
compare-match A.
0: A/D converter start requests by compare-match A are
disabled
1: A/D converter start requests by compare-match A are
enabled
Output Select 3, 2
These bits specify how the TMO0 pin output level is to be
changed by compare-match B of TCORB_0 and
TCNT_0.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)