H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 417
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
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Note: * Only 0 can be written to clear the flag.
Bit
0
Bit Name Initial Value Slave Host Description
OBF3A
0
R/(W) * R
R/W
Output Buffer Full
Set to 1 when the slave processor (this LSI) writes to
ODR. OBF is cleared to 0 when the host processor
reads ODR.
0: [Clearing condition]
When the host processor reads ODR using I/O read
cycle, or the slave processor writes 0 to the OBF bit
1: [Setting condition]
When the slave processor writes to ODR
Section 15 Host Interface LPC Interface (LPC)
Rev. 2.00 Mar 21, 2006 page 379 of 518
REJ09B0299-0200
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