H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 382
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
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Section 14 Keyboard Buffer Controller
Bit
3
2
1
0
14.3.3
KBBR stores receive data. Its value is valid only when KBF = 1.
Bit
7
6
5
4
3
2
1
0
Rev. 2.00 Mar 21, 2006 page 344 of 518
REJ09B0299-0200
Bit Name
RXCR3
RXCR2
RXCR1
RXCR0
Bit Name
KB7
KB6
KB5
KB4
KB3
KB2
KB1
KB0
Keyboard Data Buffer Register (KBBR)
Initial Value
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R
R
R
R
R/W
R
R
R
R
R
R
R
R
Description
Receive Counter
These bits indicate the received data bit. Their value
is incremented on the fall of KCLK. These bits cannot
be modified.
The receive counter is initialized to 0000 by a reset
and when 0 is written in KBE. Its value returns to 0000
after a stop bit is received.
0000: —
0001: Start bit
0010: KB0
0011: KB1
0100: KB2
0101: KB3
0110: KB4
0111: KB5
1000: KB6
1001: KB7
1010: Parity bit
1011: —
11- - : —
Description
Keyboard Data 7 to 0
8-bit read only data.
Initialized to H'00 by a reset, in standby mode, watch
mode, subactive mode, subsleep mode, and module
stop mode, and when KBIOE is cleared to 0.
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