H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 352
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
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Section 13 I
Rev. 2.00 Mar 21, 2006 page 314 of 518
REJ09B0299-0200
User processing
(master output)
(master output)
(Pin waveform)
(slave output)
(slave output)
SDA
SDA
SCL
SCL
SCL
ICDRF
ICDRS
ICDRR
IRIC
Start condition generation
2
Figure 13.18 Example of Slave Receive Mode Operation Timing (1)
C Bus Interface (IIC)
[2] ICDR read
Bit 7
1
1
Undefined value
Bit 6
(MLS = 0, HNDS = 1)
2
2
Bit 5
3
3
Slave address
Bit 4
4
4
Bit 3
5
5
Bit 2
6
6
[8] IRIC clear
Bit 1
7
7
[7] SCL is fixed low until ICDR is read
Bit 0
R/W
8
8
Address
9
9
Interrupt
request
occurrence
[6]
[10] ICDR read (dummy read)
Address
A
+R/W
+R/W
Bit 7
1
1
Data 1
Bit 6
2
2
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