H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 534
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
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Section 21 Electrical Characteristics
Table 21.7 Timing of On-Chip Peripheral Modules
Conditions: V
Item
I/O ports
FRT
TMR
PWMX
SCI
WDT
Note: * Only peripheral modules that can be used in subclock operation
Rev. 2.00 Mar 21, 2006 page 496 of 518
REJ09B0299-0200
Output data delay time
Input data setup time
Input data hold time
Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock
pulse width
Timer output delay time
Timer reset input setup time
Timer clock input setup time
Timer clock
pulse width
Pulse output delay time
Input clock
cycle
Input clock pulse width
Input clock rise time
Input clock fall time
Transmit data delay time
(synchronous)
Receive data setup time
(synchronous)
Receive data hold time
(synchronous)
RESO output delay time
RESO output pulse width
2 MHz to maximum operating frequency, T
CC
= 3.0 V to 3.6 V, V
Single edge
Both edges
Single edge
Both edges
Asynchronous
Synchronous
CC
B = 3.0 V to 5.5 V, V
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PWD
PRS
PRH
FTOD
FTIS
FTCS
FTCWH
FTCWL
TMOD
TMRS
TMCS
TMCWH
TMCWL
PWOD
Scyc
SCKW
SCKr
SCKf
TXD
RXS
RXH
RESD
RESOW
Min
—
50
50
—
50
50
1.5
2.5
—
50
50
1.5
2.5
—
4
6
0.4
—
—
—
100
100
—
132
a
= –20 to +75°C
Condition
10 MHz
SS
= 0 V, = 32.768 kHz * ,
Max
100
—
—
100
—
—
—
—
100
—
—
—
—
100
—
—
0.6
1.5
1.5
100
—
—
200
—
Unit
ns
ns
t
ns
t
ns
t
t
t
ns
ns
t
cyc
cyc
cyc
Scyc
cyc
cyc
Test Conditions
Figure 21.10
Figure 21.11
Figure 21.12
Figure 21.13
Figure 21.15
Figure 21.14
Figure 21.16
Figure 21.17
Figure 21.18
Figure 21.19
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