H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 327
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
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Bit Bit Name
4
3
AASX
AL
Initial Value R/W
0
0
R/(W) * Second Slave Address Recognition Flag
R/(W) * Arbitration Lost Flag
Description
In I
the first frame following a start condition matches bits
SVAX6 to SVAX0 in SARX.
[Setting condition]
When the second slave address is detected in slave
receive mode and FSX = 0 in SARX
[Clearing conditions]
Indicates that arbitration was lost in master mode.
[Setting conditions]
When ALSL = 0
When ALSL = 1
[Clearing conditions]
2
When 0 is written in AASX after reading AASX = 1
When a start condition is detected
In master mode
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the internal SCL line is high at the fall of SCL in
master transmit mode
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the SDA pin is driven low by another device before
the I
start condition instruction was executed in master
transmit mode
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in AL after reading AL = 1
C bus format slave receive mode, this flag is set to 1 if
2
C bus interface drives the SDA pin low, after the
Rev. 2.00 Mar 21, 2006 page 289 of 518
Section 13 I
2
C Bus Interface (IIC)
REJ09B0299-0200
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