H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 328
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
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Section 13 I
Bit Bit Name
2
1
Rev. 2.00 Mar 21, 2006 page 290 of 518
REJ09B0299-0200
AAS
ADZ
2
C Bus Interface (IIC)
Initial Value R/W
0
0
R/(W) * Slave Address Recognition Flag
R/(W) * General Call Address Recognition Flag
Description
In I
the first frame following a start condition matches bits SVA6
to SVA0 in SAR, or if the general call address (H'00) is
detected.
[Setting condition]
When the slave address or general call address (one frame
including a R/W bit is H'00) is detected in slave receive
mode and FS = 0 in SAR
[Clearing conditions]
In I
the first frame following a start condition is the general call
address (H'00).
[Setting condition]
When the general call address (one frame including a R/W
bit is H'00) is detected in slave receive mode and FS = 0 or
FSX = 0
[Clearing conditions]
If a general call address is detected while FS = 1 and FSX
= 0, the ADZ flag is set to 1; however, the general call
address is not recognized (AAS flag is not set to 1).
2
2
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in AAS after reading AAS = 1
In master mode
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in ADZ after reading ADZ = 1
In master mode
C bus format slave receive mode, this flag is set to 1 if
C bus format slave receive mode, this flag is set to 1 if
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