H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 221

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Notes: 1. If the TMR_Y clock input is set as the TCNT_X overflow signal and the TMR_X clock
Channel CKS2
TMR_X
2. The program development tool (emulator) does not support TCRXY. Selection of the
TCR
0
0
0
0
1
0
0
0
0
1
1
1
1
input is set as the TCNT_Y compare-match signal simultaneously, a count-up clock
cannot be generated. These settings should not be made.
internal clock is only available when CKSX = 0 and CKSY = 0.
CKS1
0
0
1
1
0
0
0
1
1
0
0
1
1
CKS0
0
1
0
1
0
0
1
0
1
0
1
0
1
TCRXY *
CKSX
0
0
0
0
0
1
1
1
1
1
2
CKSY
Description
Disables clock input
Increments at
Increments at /2
Increments at /4
Disables clock input
Disables clock input
Increments at /2048
Increments at /4096
Increments at /8192
Increments at compare-match A from
TCNT_Y *
Increments at rising edge of external
clock
Increments at falling edge of external
clock
Increments at both rising and falling
edges of external clock
Rev. 2.00 Mar 21, 2006 page 183 of 518
1
Section 10 8-Bit Timer (TMR)
REJ09B0299-0200

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