H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 267
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
- Current page: 267 of 559
- Download datasheet (4Mb)
12.3.7
SSR is a register containing status flags of the SCI and multiprocessor bits for transfer. TDRE,
RDRF, ORER, PER, and FER can only be cleared.
Bit
7
6
5
Bit Name
TDRE
RDRF
ORER
Serial Status Register (SSR)
Initial Value
1
0
0
R/W
R/(W) * Transmit Data Register Empty
R/(W) * Receive Data Register Full
R/(W) * Overrun Error
Description
Indicates whether TDR contains transmit data.
[Setting conditions]
[Clearing condition]
When 0 is written to TDRE after reading TDRE = 1
Indicates that receive data is stored in RDR.
[Setting condition]
When serial reception ends normally and receive
data is transferred from RSR to RDR
[Clearing condition]
The RDRF flag is not affected and retains its
previous value when the RE bit in SCR is cleared to
0.
[Setting condition]
When the next data is received while RDRF = 1
[Clearing condition]
When 0 is written to ORER after reading ORER = 1
When 0 is written to RDRF after reading RDRF = 1
Section 12 Serial Communication Interface (SCI)
When the TE bit in SCR is 0
When data is transferred from TDR to TSR and
TDR is ready for data write
Rev. 2.00 Mar 21, 2006 page 229 of 518
REJ09B0299-0200
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