PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 74

• Manufacturer Part Number: PC87332VLJ-5
• Description: PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
• Manufacturer: NSC [National Semiconductor]

7 0 Parallel Port
6 Only if no EPP write is pending when WAIT goes low (or
EPP 1 9 Address Read
The following procedure reads from the address register
See also Figure 7-5
1 The host reads a byte from the EPP address register
2 When WAIT goes low the EPP pulls ASTRB low and
3 When WAIT goes high the EPP stops pulling IOCHRDY
4 When RD goes high the EPP pins D0–7 are at TRI-
EPP 1 9 Data Write and Data Read
This procedure writes to the selected peripheral drive or
register See Figure 7-5
EPP 1 9 data read and write operations are similar to EPP
1 9 address read and write operations respectively except
that the data strobe (DSTRB signal) and a data register re-
place the address strobe (ASTRB signal) and the address
register
when bit 7 of PTR is 1 and the direction is changed to
Backwards by setting bit 5 of CTR to 1) the EPP pulls
WRITE to high
If an EPP write is pending WRITE remains low and the
EPP may change PD0–7
When RD goes low the EPP pulls IOCHRDY low and
waits for WAIT to go low
waits for WAIT to go high
If wait was already low steps 2 and 3 occur concurrently
low latches PD0–7 and pulls ASTRB high
STATE
FIGURE 7-4 EPP 1 9 Address Write
(Continued)
TL C 11930– 18
74
Parallel Port Multiplexor (PPM)
A PPM is used for a PC to interface with either a printer or
an external FDD via a 25-pin DIN connector It may have an
internal Floppy Disk Drive (FDD) connected via regular FDC
pins The printer and external FDD may be switched without
turning the PC off and without updating the DOS device
tables The software may assign ‘‘A ’’ to the FDD connected
to the regular FDC pins and ‘‘B ’’ to the FDD connected to
the PPM pins (the default assignment) or vice versa
The Multiplexors
1 The FDC output signals are always connected to the reg-
2 Floating the PPM pins
ular FDC output pins
The FDC output signals are connected to the PPM output
pins when the PPM is enabled (bit 2 of FCR is 1) and a
floppy drive is connected to it (PFN
Table 7-5 )
The FDC input signals are connected to the regular FDC
pins when either bit 2 of FCR is 0 or PNF
The FDC input pins are internally multiplexed between
the regular FDC pins and the PPM pins when bit 2 of FCR
is 1 and PNF
To support ‘‘true’’ floating pins the pins are back-drive
protected
When bit 3 of FCR is 1 the PPM pins are floated
the PPM pins are connected to the FDC input signals
when DR1
the regular pins are connected to the FDC input sig-
nals when DR1
FIGURE 7-5 EPP 1 9 Address Read
e
e
0 as follows
0
e
1
e
e
TL C 11930 – 19
1
0)
(See