PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 14

• Manufacturer Part Number: PC87332VLJ-5
• Description: PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
• Manufacturer: NSC [National Semiconductor]

PDACK
PDRQ
PWDN
PE
PNF
RD
RDATA
RDATA
RI1 2
RTS1 2
SIN1 2
SLCT
SLIN
SOUT1 2
Symbol
1 0 Pin Description
Normal
Mode
PPM
Mode
70 62
74 66
75 67
73 65
Pin
54
33
83
49
19
35
91
82
81
3
I O
I O
O
O
O
I
I
I
I
I
I
I
I
I
I
Printer DMA Acknowledge Active low input to acknowledge the printer DMA request and enable the
RD and WR inputs during a DMA transfer This pin is PDACK input pin when bit 3 of PMC is 1 It is
IDENT when bit 3 of PMC is 0 PDACK input pin is ECP DMA acknowledge
PDACK is assumed to be 1 when bit 3 of PMC is 0
IDENT is assumed to be 1 when bit 3 of PMC is 1
This input is valid only in ECP mode
Printer DMA Request Active high output to signal the DMA controller that a printer data transfer is
required This pin is in TRI-STATE when ECP is disabled (bit 2 of PCR is 0) or configured with no DMA
(bit 3 of PMC is 0) This output is valid only in ECP mode
Power Down This multi-function pin stops the clocks and or the external crystal based on the
selections made in the Power and Test Register bits 1-2 This pin also affects the FDC UARTs IDE
and Parallel Port pins when the relevant PMC register bits are set (See ZWS for further information )
Paper End This input is set high by the printer when it is out of paper This pin has a nominal 25 k
pull-down resistor attached to it (See WDATA and Table 7-5 for further information )
Printer Not Floppy PNF is the Printer Not Floppy pin when bit 2 of FCR is 1 It selects the device
which is connected to the PPM pins A parallel printer is connected when PNF
drive is connected when PNF
further information )
Read Active low input to signal data read by the microprocessor
Read Data This input is the raw serial data read from the floppy disk drive
Read Data This pin provides an additional Read Data signal in PPM Mode when PNF
and Table 7-5 for further information )
Ring Indicator When low this indicates that a telephone ring signal has been received by the MODEM
The RI signal is a MODEM status input whose condition the CPU can test by reading bit 6 (RI) of the
MODEM Status Register (MSR) for the appropriate serial channel Bit 6 is the complement of the RI
signal Bit 2 (TERI) of the MSR indicates whether the RI input has changed from low to high since the
previous reading of the MSR
Note When the TERI bit of the MSR is set an interrupt is generated if MODEM Status interrupts are enabled
Request to Send When low this output indicates to the MODEM or data set that the UART is ready to
exchange data The RTS signal can be set to an active low by programming bit 1 (RTS) of the MODEM
Control Register to a high level A Master Reset operation sets this signal to its inactive (high) state
Loop mode operation holds this signal to its inactive state (See CFG0 – 4 for further information )
Serial Input This input receives composite serial data from the communications link (e g peripheral
device MODEM or data set)
Select When a printer is connected it sets this input high This pin has a nominal 25 k pull-down
resistor attached to it
Select Input When this signal is low it selects the printer This pin is in a TRI-STATE condition 10 ns
after a 0 is loaded into the corresponding Control Register bit The system should pull this pin high
using a 4 7 k
Serial Output This output signal sends composite serial data to the communications link (e g
peripheral device MODEM or data set) The SOUT signal is set to a marking state (logic 1) after a
Master Reset operation (See BOUT and CFG0– 4 for further information )
(Continued)
resistor (See ASTRB STEP and Table 7-5 for further information )
e
0 This pin is the DRV2 input pin when bit 2 of FCR is 0 (See DRV2 for
14
Function
e
1 and a floppy disk
e
0 (See PD3