PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 5

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PC87332VLJ-5

Manufacturer Part Number
PC87332VLJ-5
Description
PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
Manufacturer
NSC [National Semiconductor]
Datasheet
FIGURE 2-1
FIGURE 2-2
FIGURE 3-1
FIGURE 4-1
FIGURE 4-2
FIGURE 5-1
FIGURE 5-2
FIGURE 5-3
FIGURE 6-1
FIGURE 6-2
FIGURE 7-1
FIGURE 7-2
FIGURE 7-3
FIGURE 7-4
FIGURE 7-5
FIGURE 7-6
FIGURE 7-7
FIGURE 8-1
FIGURE 9-1
FIGURE 9-2
FIGURE 9-3
FIGURE 9-4
FIGURE 9-5
FIGURE 9-6a
FIGURE 9-6b
FIGURE 9-6c
FIGURE 9-6d
FIGURE 9-7
FIGURE 9-8
FIGURE 9-9
FIGURE 9-10
FIGURE 9-11
FIGURE 9-12
FIGURE 9-13
FIGURE 9-14
FIGURE 9-15
FIGURE 9-16
FIGURE 9-17
FIGURE 9-18
FIGURE 9-19
PC87332VLJ PC87332VLJ-5 Configuration Registers
PC87332 Four Floppy Drive Circuit Example
FDC Functional Block Diagram
FDC Command Structure
IBM Perpendicular and ISO Formats Supported by the Format Command
PC87332 Dynamic Window Margin Performance
Read Data Algorithm State Diagram
Perpendicular Recording Drive R W Head and Pre-Erase Head
PC87332 Composite Serial Data
Reciever FIFO Trigger Level
EPP 1 7 Address Write
EPP 1 7 Address Read
EPP Write with ZWS
EPP 1 9 Address Write
EPP 1 9 Address Read
ECP (Forward) Write Cycle
ECP (Backward) Read Cycle
IDE Interface Signal Equations (Non-DMA)
Clock Timing
Microprocessor Read Timing
Microprocessor Write Timing
Baud Out Timing
Transmitter Timing
Sample Clock Timing
Receiver Timing
Mode Receiver Timing
Timeout Receiver Timing
MODEM Control Timing
DMA Timing
Reset Timing
Write Data Timing
Drive Control Timing
Read Data Timing
IDE Timing
Compatible Mode Parallel Port Interrupt Timing
Extended Mode Parallel Port Interrupt Timing
Typical Parallel Port Data Exchange
Enhanced Parallel Port Timing
ECP Parallel Port Forward Timing Diagram
ECP Parallel Port Backward Timing Diagram
List of Figures
5

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