SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 96

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SAF82525

Manufacturer Part Number
SAF82525
Description
Data Communications ICs
Manufacturer
Infineon Technologies AG
Datasheet

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0
HA1, HA0 … High Byte Address Compare; significant only if 2-byte address mode has
been selected.
Note:
C/R … Command/Response; significant only, if 2-byte address mode has been selected.
LA … Low Byte Address Compare; not significant in transparent and extended
transparent operating modes.
Note:
Semiconductor Group
In operating modes which provide high byte address recognition, the HSCX compares the
high byte of a 2-bytes address with the contents of two individual programmable registers
(RAH1, RAH2) and the fixed values FE
Dependent on the result of this comparison, the following bit combinations are possible:
10 … RAH1 has been recognized
00 … RAH2 has been recognized
01 … group address has been recognized
Value of the C/R bit (bit of high address byte) in the received frame. The interpretation
depends on the setting of the CRI bit in the RAH1 register. Refer also to the description of
RAH1 register.
The low byte address of a 2-byte address field, or the single address byte of a 1-byte
address field is compared with two programmable registers (RAL1, RAL2)
0 … RAL2 has been recognized
1 … RAL1 has been recognized
According to the X.25 LAPB protocol, RAL1 is interpreted as COMMAND and RAL2
interpreted as RESPONSE.
If RAH1, RAH2 contain the identical values, the combination 00 will be omitted.
RSTA corresponds to the last received HDLC frame; it is duplicated into RFIFO for
every frame (last byte of frame).
H
and FC
96
H
(group address).
SAB 82525
SAB 82526
SAF 82525
SAF 82526

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