SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 100

• Manufacturer Part Number: SAF82525
• Description: Data Communications ICs
• Manufacturer: Infineon Technologies AG

TIO … Transmit Clock Input Output Switch
BR9, BR8 … Baudrate, Bit 9-8 (higher significant bits, refer to description of BGR
register).
BDF … Baudrate Division Factor
Channel Configuration Register 2 (READ/WRITE)
Value after RESET: 00
The meaning of the individual bits in CCR2 depends on the selected clock mode via
CCR 1 as follows:
CCR2
clock mode 0,1
clock mode 2,6
clock mode 3,7
clock mode 5
clock mode 4
SOC1, SOC0 … Special Output Control
TSS … Transmit Clock Source Select
Semiconductor Group
0 … T CLKA, T CLKB pins are inputs
1 … T CLKA, T CLKB pins are outputs
0 … The division factor of the baudrate generator is set to 1 (constant).
1 … The division factor is adjusted with BR9 – BR0 bits of CCR2 and BRG register.
In a bus configuration (selected via CCR1) the function of pin RTS can be defined
00 … RTS output is activated during the transmission of a frame.
10 … RTS output is always high (RTS disabled).
11 … RTS indicates the reception of a data frame (active low).
In point-to-point configuration (selected via CCR1) the T
0X … data is transmitted on T
1X … data is transmitted on R
0 … The transmit clock is input to the T CLKA/T CLKB pins.
1 … The transmit clock is derived from the baudrate generators output divided by 16.
SOC1 SOC0
SOC1 SOC0 XCS0 RCS0
SOC1 SOC0
BR9
BR9
H
BR8
BR8
BDF
BDF
D, received on R
D, received on T
0
0
TSS
100
0
0
0
TIO
TIO
TIO
TIO
0
D pin (normal case)
D pin
CIE
CIE
CIE
CIE
CIE
D and R
RIE
RIE
RIE
RIE
RIE
D pins may be flipped
DIV
DIV
DIV
DIV
DIV
SAB 82525
SAB 82526
SAF 82525
SAF 82526
(2C/6C)