SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 124

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SAF82525

Manufacturer Part Number
SAF82525
Description
Data Communications ICs
Manufacturer
Infineon Technologies AG
Datasheet

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0
The adaption of the AxCLKA/B pulses is solved by means of shifting the receive data and
transmit data in the ACFA device appropriately. In this case the AxCLKA and AxCLKB
synchronization pulses are also identical. The ACFA device contains special registers to
control the bit shift of the serial bit streams at the system interface (see ACFA Data Sheet).
With the following register programming the bit shift selected is T = – 510 for the HSCX
transmit data and T = 1 for the receive data respectively. The programming is as follows:
XDI:
RDO:
The timing in principle is depicted in the following diagram. Without all details of a typical
electrical timing it illustrates how the different signals from HSCX, ACFA and PRACT are
mapped in such a Primary Access system.
HSCX Signal Mapping for Primary Rate Interface T1/E1 Siemens System Interface
(ACFA/PRACT)
Semiconductor Group
ACFA Programming for Appropriate Delays (see ACFA Data Sheet):
XDI :
RDO :
CLK4M
FSC
AxCLKA/B
RxCLKA/B
TxCLKA/B
TxDA/B
=
RxDA/B
=
XDI
RDO
T = - 510 = > X = 495 = > XC1.XTO = 3D
(T
T
(T
=
=
=
= 1
=
-510)
XC1.XTO = 3D
XC0.XCO = 07
RC1.RTO = 00
RC0. RCO = 03
=
=
FSC
CLK2M
1)
>
X
=
3
=
>
RC1.RTO
= : Channel 0,Bit 0 (Least Significant Bit)
H
H
H
H
=
0
,
RC0.RCO
=> X = 494
=> X = 3
H
,
XC0.XCO = 7
=
3
H
124
H
=> T = – 510
=> T = 1
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