SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 75

• Manufacturer Part Number: SAF82525
• Description: Data Communications ICs
• Manufacturer: Infineon Technologies AG

The following figure gives an example of a DMA driven transmission sequence with a
supposed frame length of 70 bytes, i.e. programmed transmit byte count (XCNT) equal
69 bytes.
Figure 36
DMA Driven Transmission Sequence Example
7.5 Data Reception
Interrupt Mode
Also 2 32 byte FIFO buffers (receive pools) are provided for each channel in receive direction.
There are two different interrupt indications concerned with the reception of data:
– RPF (Receive Pool Full) interrupt, indicating that a 32 byte block of data can be read from
the RFIFO and the received message is not yet complete.
– RME (Receive Message End) interrupt, indicating that the reception of one message is
completed, i.e. either
is stored in the RFIFO.
After an interrupt has been processed, i.e. the received data has been read from the RFIFO,
this must be explicitly acknowledged by the CPU issuing a RMC (Receive Message Complete)
command.
The CPU has to handle the RPF interrupt before additional 32 bytes are received via the serial
interface which would cause a "Receive Data Overflow" condition.
Semiconductor Group
Serial
Interface
HSCX
CPU/DMA
Interface
one message with less than 32 bytes, or the
last part of a message with more than 32 bytes
XCNT
(69)
WR
XTF
DRQT(32)
WR
. . .
WR
DRQT(32)
DMA Write Cycles (70)
WR
. . .
75
32
WR
Transmit Frame (70
DRQT(6)
WR
. . .
Bytes)
WR
32
SAB 82525
SAB 82526
SAF 82525
SAF 82526
6
ITD00250
XPR