SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 58
SAF82525
Manufacturer Part Number
SAF82525
Description
Data Communications ICs
Manufacturer
Infineon Technologies AG
Datasheet
1.SAF82525.pdf
(126 pages)
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The following functions have been implemented to facilitate a high-speed and reliable
synchronization (see figures 28).
– Interference Rejection
In the case where two or more edges appear in the data stream within a time period of 16
reference clocks, these are detected as interference without performing additional
adjustments.
Figure 28b
– Phase Adjustment
In the case where an edge with a phase angle of 20 to 112 degrees appears in the data stream
within the time window, the phase will be adjusted by 1/16 of the data clock.
Figure 28c
Semiconductor Group
16
Receive Data
Reference Clock
Data Clock Rate
Phase Adjustment
R
DPLL CLK
Rec. Data
x Nominal
D x
=
0
58
DPLL
Receive
Clock
1
Receiver
ITT00241
ITS06029
SAB 82525
SAB 82526
SAF 82525
SAF 82526