SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 53

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SAF82525

Manufacturer Part Number
SAF82525
Description
Data Communications ICs
Manufacturer
Infineon Technologies AG
Datasheet

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This must be considered for applications, where several transmitters are sharing the same
time-slot on a non open-drain bus, e.g. a balanced bus, not using collision detection as the
resolution mechanism. One such application is slave stations in a point-to-multipoint
configuration sharing the same time-slot and using NRM auto-mode. Thus, RTS and the time-
slot marker TxCLK cannot simply be gated to generate a driver control signal. Instead the
following recommendations apply:
a) Do not use the RTS signal directly in clock mode 5 e.g. to enable drivers for TxD in a
Figure 25
Semiconductor Group
balanced bus configuration. Instead, use an arrangement of the type shown in the figure 25
or
HSCX
TxD
53
D
Transmission Line
V
V
DD
SS
ITD05980
SAB 82525
SAB 82526
SAF 82525
SAF 82526

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