SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 121
SAF82525
Manufacturer Part Number
SAF82525
Description
Data Communications ICs
Manufacturer
Infineon Technologies AG
Datasheet
1.SAF82525.pdf
(126 pages)
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8
In case the DPLL detects an edge in the data stream in the range of DPLL count 5 to 10 (Phase
Shift) and this is the only one in the assumed bit cell period, then the DPLL receive clock phase
is shifted by a certain DPLL count value. The DPLL value and its corresponding phase shift in
degree is listed below for the HSCX versions VA3 and V2.1:
HSCX Version
VA3
V2.1
Differences
t
t
t
t
t
t
t
Semiconductor Group
RD
RR
RI
XDD1 min
RTD1 min
RTD2 min
TCD min
Clock Recovery (DPLL)
DPLL Count
8
7
Ver. A3
100/110 ns
120 ns
60 ns
20 ns
30 ns
20 ns
20 ns
121
Phase Shift
180
157.5
Ver. 2.1
60/70 ns
70 ns
35 ns
10 ns
10 ns
10 ns
10 ns
SAB 82525
SAB 82526
SAF 82525
SAF 82526