SAF82525 Infineon Technologies AG, SAF82525 Datasheet - Page 69

• Manufacturer Part Number: SAF82525
• Description: Data Communications ICs
• Manufacturer: Infineon Technologies AG

7
7.1 RESET
The HSCX is forced into the reset state if a high signal is input to the RES pin for a minimum
period of 1.8 s. During RESET, the HSCX is temporarily in the power-up mode, and a subset
of the registers is initialized with defined values.
After RESET, the HSCX is in power down mode, and the following registers contain defined
values:
Table 7
RESET Values
Register
CCR1
CCR2
MODE
STAR
ISTA
EXIR
CMDR
XBCH
RBCH
XCCR
RCCR
Semiconductor Group
Operational Description
RESET
Value
00
00
00
00
00
00
00
48
H
H
H
H
H
H
H
H
Meaning
– power down mode
serial port configuration; pt-pt, NRZ coding, transmit data pins
are open drain outputs
– clock mode 0
RTS pin normal function
– CTS and RFS interrupts disabled no data inversion
auto-mode
1 byte address field
external timer mode
– receivers inactive
RTS output controlled by HSCX, timer resolution:
k = 32.768, no testloop
XFIFO write enable
receive line inactive
no commands executing
– no interrupts masked
no commands
– interrupt controlled data transfer (DMA disabled)
– full-duplex LAPB/LAPD operation of LAP controller
– carrier detect auto start of receiver disabled
1-bit time-slot
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SAB 82525
SAB 82526
SAF 82525
SAF 82526