ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 94

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ISP1362EE/01

Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors
Table 65:
9397 750 12337
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcDMAConfiguration register: bit allocation
DMACounter
Enable
R/W
15
15.4.2 HcDMAConfiguration register (R/W: 21H/A1H)
7
0
-
-
Table 65
Code (Hex): 21 — read
Code (Hex): A1 — write
Table 66:
Bit
15 to 8
7
6 to 5
4
3 to 1
0
R/W
14
6
0
-
-
BurstLen[1:0]
contains the bit allocation of the HcDMAConfiguration register.
HcDMAConfiguration register: bit description
Symbol
-
DMACounterEnable
BurstLen[1:0]
DMAEnable
Buffer_Type_Select
[2:0]
DMAReadWriteSelect
R/W
13
5
0
-
-
Rev. 03 — 06 January 2004
Enable
DMA
R/W
12
4
0
-
-
reserved
Description
reserved
0 — reserved
1 — DMA counter is enabled. Once the counter is
enabled, the HCD must initialize the HcTransferCounter
register to a non-zero value for DREQ to be raised after
the DMAEnable bit is set to HIGH.
00 — single-cycle burst DMA
01 — 4-cycle burst DMA
10 — 8-cycle burst DMA
11 — reserved
I/O bus with 32-bit data path width supports only single
and four cycle DMA burst.
0 — DMA is disabled
1 — DMA is enabled
This bit needs to be reset when the DMA transfer is
completed.
Bit 3
0
0
0
0
1
0 — read from the buffer memory of the HC
1 — write to the buffer memory of the HC
R/W
11
Bit 2
0
0
1
1
X
3
0
-
-
Buffer_Type_Select[2:0]
Bit 1
0
1
0
1
X
Single-chip USB OTG controller
R/W
10
2
0
-
-
Buffer Type
ISTL0 (default)
ISTL1
INTL
ATL
Direct Addressing
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
R/W
9
1
0
-
-
ISP1362
WriteSelect
DMARead
R/W
94 of 150
8
0
0
-
-

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