ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 58

• Manufacturer Part Number: ISP1362EE/01
• Description: Single-chip Universal Serial Bus On-The-Go controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9397 750 12337
Product data
13.5.1 Suspend conditions
13.5 ISP1362 DC suspend and resume
Isochronous endpoints:
terminated by any of the following conditions (bit names refer to the
DcDMAConfiguration register, see
Table 20:
The DC in the ISP1362 detects a USB suspend condition in either of the following
cases:
Bus-powered devices that are suspended must not consume more than 500 A of
current. This is achieved by shutting down the power to system components or
supplying them with a reduced voltage.
The steps leading the DC to the suspend state are as follows:
EOT condition
DcDMACounter register zero
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•
•
•
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1. In the event of no SOF for 3 ms, the DC in the ISP1362 sets bit SUSPND of the
2. When the firmware detects a suspend condition (through the IESUSP), it must
3. In the interrupt service routine, the firmware must check the current status of the
4. To meet the suspend current requirements for a bus-powered device, the internal
5. When the firmware has set and cleared the GOSUSP bit of the DcMode register,
The DMA transfer completes as programmed in the DcDMACounter register
(CNTREN = 1)
An End-Of-Packet (EOP) signal is detected
DMA operation is disabled by clearing bit DMAEN.
Constant idle state is present on the USB bus for 3 ms.
V
DcInterrupt register. This will generate an interrupt if bit IESUSP of the
DcInterruptEnable register is set.
prepare all system components for the suspend state:
USB bus. When bit BUSTATUS of the DcInterrupt register is logic 0, the USB bus
has left the suspend mode and the process must be aborted. Otherwise, the next
step can be executed.
clocks must be switched off by clearing bit CLKRUN of the
DcHardwareConfiguration register.
the DC in the ISP1362 enters the suspend state. It sets the
D_SUSPEND/D_WAKEUP pin to HIGH and switches off the internal clocks after
2 ms.
BUS
a. All the signals connected to the DC in the ISP1362 must enter appropriate
b. All the input pins of the DC in the ISP1362 must have a CMOS logic 0 or
states to meet the power consumption requirements of the suspend state.
logic 1 level.
is lost.
Recommended EOT usage for isochronous endpoints
Rev. 03 — 06 January 2004
A DMA transfer to or from an isochronous endpoint can be
OUT endpoint
do not use
Table 118
and
Table
Single-chip USB OTG controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
119):
IN endpoint
preferred
ISP1362
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