ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 9
ISP1362EE/01
Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.ISP1362EE01.pdf
(150 pages)
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Philips Semiconductors
Table 2:
9397 750 12337
Product data
Symbol
V
D12
D13
D14
D15
DGND
RD
CS
WR
TEST0
DREQ1
DREQ2
CC
[1]
Pin description
14
15
16
17
18
19
20
21
22
23
24
25
LQFP64
Pin
…continued
J2
J1
K1
K2
J3
K3
J4
K4
J5
K5
J6
K6
TFBGA64
Ball
Type
-
I/O
I/O
I/O
I/O
-
I
I
I
I/O
O
O
[2]
Rev. 03 — 06 January 2004
Description
supply voltage (3.3 V); it is recommended to connect a decoupling
capacitor of 0.01 F
bit 12 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
bit 13 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
bit 14 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
bit 15 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
digital ground
read strobe input; when asserted LOW, it indicates that the HC/DC
driver is requesting a read to the buffer memory or the internal
registers of the HC/DC
input with hysteresis
chip select input (active LOW); enables the HC/DC driver to access
the buffer memory and registers of the HC/DC
input
write strobe input; when asserted LOW, it indicates that the HC/DC
driver is requesting a write to the buffer memory or the internal
registers of the HC/DC
input with hysteresis
for test input and output; pulled HIGH by a 100 k resistor
bidirectional, push-pull input, three-state output
DMA request output; when active, it signals the DMA controller that a
data transfer is requested by the HC; the active level (HIGH or LOW)
of the request is programmed by using the HcHardwareConfiguration
register (20H/A0H)
If the OneDMA bit of the HcHardwareConfiguration register is set to
logic 1, both the HC and DC DMA channel will be routed to DREQ1
and DACK1.
push-pull output
DMA request output; when active, it signals the DMA controller that a
data transfer is requested by the DC; the active level (HIGH or LOW)
of the request is programmed by using the DcHardwareConfiguration
register (BAH/BBH)
push-pull output
Single-chip USB OTG controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1362
9 of 150
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