PIC18C658 MICROCHIP [Microchip Technology], PIC18C658 Datasheet - Page 31
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PIC18C658
Manufacturer Part Number
PIC18C658
Description
High-Performance Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C658.pdf
(366 pages)
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3.6
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked after the POR time
delay has expired, then OST is activated. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
Figure 3-3, Figure 3-4, Figure 3-5, Figure 3-6 and
Figure 3-7 depict time-out sequences on power-up.
TABLE 3-1:
REGISTER 3-1:
TABLE 3-2:
2000 Microchip Technology Inc.
HS with PLL enabled
HS, XT, LP
EC
External RC
Note 1: 2 ms = Nominal time required for the 4X PLL to lock.
Power-on Reset
MCLR Reset during normal
operation
Software Reset during normal
operation
Stack Full Reset during normal
operation
Stack Underflow Reset during
normal operation
MCLR Reset during SLEEP
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0'
Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
Configuration
2: 72 ms is the nominal power-up timer delay.
Oscillator
Time-out Sequence
interrupt vector (0x000008h or 0x000018h).
Condition
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
(1)
RCON REGISTER BITS AND POSITIONS
bit 7
R/W-0
72 ms + 1024Tosc + 2 ms 1024Tosc + 2 ms 72 ms + 1024Tosc + 2 ms 1024Tosc + 2 ms
72 ms + 1024Tosc
72 ms
72 ms
IPEN
PWRTEN = 0
PC + 2
Program
Counter
PC + 2
R/W-0
LWRT
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
Power-up
Advanced Information
(1)
00-1 1100
00-u uuuu
0u-0 uuuu
0u-u uu11
0u-u uu11
00-u 10uu
0u-u 01uu
uu-u 00uu
0u-1 11u0
uu-u 00uu
Register
(2)
U-0
1024Tosc
—
—
RCON
—
PWRTEN = 1
R/W-1
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire.
Bringing MCLR high will begin execution immediately
(Figure 3-5). This is useful for testing purposes or to
synchronize more than one PIC18CXX8 device operat-
ing in parallel.
Table 3-2 shows the RESET conditions for some Spe-
cial Function Registers, while Table 3-3 shows the
RESET conditions for all registers.
RI
RI
1
u
0
u
u
u
u
u
1
u
TO
72 ms + 1024Tosc
72 ms
72 ms
1
u
u
u
u
1
0
0
1
0
R/W-1
PD
1
u
u
u
u
0
1
0
1
0
Brown-out
TO
POR
0
u
u
1
1
u
u
u
u
u
R/W-1
(2)
PIC18CXX8
PD
BOR
0
u
u
1
1
u
u
u
0
u
STKFUL
1024Tosc
—
—
R/W-1
POR
Oscillator Switch
Wake-up from
u
u
u
u
1
u
u
u
u
u
DS30475A-page 31
SLEEP or
STKUNF
R/W-1
BOR
u
u
u
1
u
u
u
u
u
u
bit 0
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