PIC18C658 MICROCHIP [Microchip Technology], PIC18C658 Datasheet - Page 25

• Manufacturer Part Number: PIC18C658
• Description: High-Performance Microcontrollers with CAN Module
• Manufacturer: MICROCHIP [Microchip Technology]

2.6
The PIC18CXX8 devices include a feature that allows
the system clock source to be switched from the main
oscillator to an alternate low frequency clock source.
For the PIC18CXX8 devices, this alternate clock
source is the Timer1 oscillator. If a low frequency crys-
tal (32 kHz, for example) has been attached to the
Timer1 oscillator pins and the Timer1 oscillator has
been enabled, the device can switch to a low power
execution mode. Figure 2-6 shows a block diagram of
the system clock sources. The clock switching feature
is enabled by programming the Oscillator Switching
Enable (OSCSEN) bit in Configuration register
CONFIG1H to a ’0’. Clock switching is disabled in an
erased device. See Section 9 for further details of the
Timer1 oscillator. See Section 22.0 for Configuration
Register details.
FIGURE 2-6:
REGISTER 2-1:
 2000 Microchip Technology Inc.
Oscillator Switching Feature
bit 7-1
bit 0
DEVICE CLOCK SOURCES
OSC2
OSC1
T1OSO
T1OSI
Note:
OSCCON REGISTER
bit 7
Unimplemented: Read as '0'
SCS: System Clock Switch bit
when OSCSEN configuration bit = ’0’ and T1OSCEN bit is set:
1 = Switch to Timer1 Oscillator/Clock pin
0 = Use primary Oscillator/Clock input pin
when OSCSEN is clear or T1OSCEN is clear:
bit is forced clear
Legend:
R = Readable bit
- n = Value at POR
U-0
—
I/O pins have diode protection to V
Timer 1 Oscillator
Main Oscillator
PIC18CXX8
U-0
—
Advanced Information
SLEEP
T1OSCEN
Enable
Oscillator
U-0
W = Writable bit
’1’ = Bit is set
—
DD
Clock Source option
for other modules
4 x PLL
and V
2.6.1
The system clock source switching is performed under
software control. The system clock switch bit, SCS
(OSCCON register), controls the clock switching. When
the SCS bit is ’0’, the system clock source comes from
the main oscillator selected by the FOSC2:FOSC0 con-
figuration bits. When the SCS bit is set, the system clock
source will come from the Timer1 oscillator. The SCS bit
is cleared on all forms of RESET.
U-0
T
—
T
Note:
T
OSC
1
P
SS
.
SYSTEM CLOCK SWITCH BIT
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Tosc/4
The Timer1 oscillator must be enabled to
switch the system clock source. The
Timer1 oscillator is enabled by setting the
T1OSCEN bit in the Timer1 control register
(T1CON). If the Timer1 oscillator is not
enabled, any write to the SCS bit will be
ignored (SCS bit forced cleared) and the
main oscillator will continue to be the sys-
tem clock source.
U-0
—
Source
Clock
U-0
PIC18CXX8
—
x = Bit is unknown
T
U-0
SCLK
—
DS30475A-page 25
R/W-1
SCS
bit 0