PIC18C658 MICROCHIP [Microchip Technology], PIC18C658 Datasheet - Page 169

• Manufacturer Part Number: PIC18C658
• Description: High-Performance Microcontrollers with CAN Module
• Manufacturer: MICROCHIP [Microchip Technology]

16.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In Asynchronous
mode, bit BRGH (TXSTA register) also controls the
baud rate. In Synchronous mode, bit BRGH is ignored.
Table 16-1 shows the formula for computation of the
baud rate for different USART modes, which only apply
in Master mode (internal clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 16-1. From this, the error in
baud rate can be determined.
Example 16-1 shows the calculation of the baud rate
error for the following conditions:
EXAMPLE 16-1: CALCULATING BAUD RATE ERROR
TABLE 16-1:
TABLE 16-2:
 2000 Microchip Technology Inc.
Desired Baud Rate
Solving for X:
Calculated Baud Rate
Error
Legend: X = value in SPBRG (0 to 255)
Name
TXSTA
RCSTA
SPBRG
Legend: x = unknown, - = unimplemented, read as '0'. Shaded cells are not used by the BRG.
SYNC
0
1
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
USART Baud Rate Generator (BRG)
X
X
X
Baud Rate Generator Register
= 16 MHz
CSRC
SPEN
Bit 7
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
Bit 6
TX9
RX9
=
=
=
=
=
=
=
=
=
BRGH = 0 (Low Speed)
SREN
TXEN
Bit 5
F
( (F
((16000000 / 9600) / 64) - 1
[25.042] = 25
16000000 / (64 (25 + 1))
9615
(Calculated Baud Rate - Desired Baud Rate)
(9615 - 9600) / 9600
0.16%
OSC
OSC
OSC
/ (64 (X + 1))
, the nearest
SYNC
CREN
/ Desired Baud Rate) / 64 ) - 1
Bit 4
Advanced Information
Desired Baud Rate
ADDEN
Bit 3
OSC
OSC
—
/(64(X+1))
/(4(X+1))
BRGH
FERR
Bit 2
It may be advantageous to use the high baud rate
(BRGH = 1), even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
16.1.1
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
TRMT
OERR
Bit 1
SAMPLING
OSC
RX9D
TX9D
Bit 0
/(16(X + 1)) equation can reduce the
Baud Rate = F
BRGH = 1 (High Speed)
0000 -010
0000 000x
0000 0000
PIC18CXX8
Value on
POR,
BOR
NA
OSC
DS30475A-page 169
/(16(X+1))
Value on all
0000 -010
0000 000x
0000 0000
RESETS
other