PIC18C658 MICROCHIP [Microchip Technology], PIC18C658 Datasheet - Page 117
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PIC18C658
Manufacturer Part Number
PIC18C658
Description
High-Performance Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C658.pdf
(366 pages)
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11.0
The Timer1 module timer/counter has the following fea-
tures:
• 16-bit timer/counter
• Readable and writable (both registers)
• Internal or external clock select
• Interrupt on overflow from FFFFh to 0000h
• RESET from CCP module special event trigger
REGISTER 11-1:
2000 Microchip Technology Inc.
(Two 8-bit registers: TMR1H and TMR1L)
TIMER1 MODULE
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
RD16: 16-bit Read/Write Mode Enable bit
1 = Enables register Read/Write of TImer1 in one 16-bit operation
0 = Enables register Read/Write of Timer1 in two 8-bit operations
Unimplemented: Read as '0'
T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
T1OSCEN: Timer1 Oscillator Enable bit
1 = Timer1 Oscillator is enabled
0 = Timer1 Oscillator is shut off
The oscillator inverter and feedback resistor are turned off to eliminate power drain.
T1SYNC: Timer1 External Clock Input Synchronization Select bit
When TMR1CS = 1:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR1CS = 0:
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
TMR1CS: Timer1 Clock Source Select bit
1 = External clock from pin RC0/T1OSO/T13CKI (on the rising edge)
0 = Internal clock (F
TMR1ON: Timer1 On bit
1 = Enables Timer1
0 = Stops Timer1
Legend:
R = Readable bit
- n = Value at POR
bit 7
T1CON REGISTER
R/W-0
RD16
U-0
—
OSC
Advanced Information
T1CKPS1
/4)
R/W-0
W = Writable bit
’1’ = Bit is set
T1CKPS0
R/W-0
Register 11-1 shows the Timer1 control register. This
register controls the operating mode of the Timer1
module as well as contains the Timer1 oscillator enable
bit (T1OSCEN). Timer1 can be enabled/disabled by
setting/clearing control bit TMR1ON (T1CON register).
Figure 11-1 is a simplified block diagram of the Timer1
module.
Note:
T1OSCEN
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Timer1 is disabled on POR.
T1SYNC
R/W-0
PIC18CXX8
TMR1CS
x = Bit is unknown
R/W-0
DS30475A-page 117
TMR1ON
R/W-0
bit 0
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