PIC18C658 MICROCHIP [Microchip Technology], PIC18C658 Datasheet - Page 284
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PIC18C658
Manufacturer Part Number
PIC18C658
Description
High-Performance Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C658.pdf
(366 pages)
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PIC18CXX8
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30475A-page 284
Before Instruction
After Instruction
Decode
WREG
N
Z
WREG
N
Z
Q1
=
=
=
=
=
=
Inclusive OR literal with WREG
[ label ]
0
(WREG) .OR. k
N,Z
The contents of WREG are OR’ed
with the eight bit literal 'k'. The
result is placed in WREG.
1
1
literal ’k’
IORLW
Read
0000
Q2
0x9A
?
?
0xBF
1
0
k
255
IORLW k
1001
0x35
Process
Data
Q3
WREG
kkkk
Advanced Information
Write to W
Q4
kkkk
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
RESULT =
WREG
N
Z
RESULT =
WREG
N
Z
Q1
=
=
=
=
=
=
register ’f’
Inclusive OR WREG with f
[ label ]
0
d
a
(WREG) .OR. (f)
N,Z
Inclusive OR W with register 'f'. If 'd'
is 0, the result is placed in WREG.
If 'd' is 1, the result is placed back
in register 'f' (default). If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1, the
Bank will be selected as per the
BSR value.
1
1
IORWF
Read
0001
Q2
0x13
0x91
?
?
0x13
0x93
1
0
f
[0,1]
[0,1]
2000 Microchip Technology Inc.
255
RESULT, W
IORWF
00da
Process
Data
Q3
ffff
f [ ,d [,a] ]
dest
destination
Write to
Q4
ffff
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