DAC1408D650HW/C1 NXP [NXP Semiconductors], DAC1408D650HW/C1 Datasheet - Page 22

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DAC1408D650HW/C1

Manufacturer Part Number
DAC1408D650HW/C1
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
DAC1408D650_1
Objective data sheet
The SPI timing characteristics are given in
Table 10.
Symbol
f
t
t
t
t
t
t
SCLK
w(SCLK)
su(SCS_N)
h(SCS_N)
su(SDIO)
h(SDIO)
w(RESET_N)
Fig 10. SPI timing diagram
RESET_N
(optional)
SCS_N
SCLK
SDIO
SPI timing characteristics
Parameter
SCLK frequency
SCLK pulse width
SCS_N set-up time
SCS_N hold time
SDIO set-up time
SDIO hold time
RESET_N pulse width
50 %
50 %
50 %
t
w(RESET_N)
Rev. 01 — 26 May 2009
50 %
Dual 14-bit DAC, up to 650 Msps, 2 and 4 interpolating
t
t
su(SCS_N)
su(SDIO)
t
h(SDIO)
Table
Min
-
30
20
20
10
5
30
10.
t
w(SCLK)
Typ
-
-
-
-
-
-
-
DAC1408D650
Max
15
-
-
-
-
-
-
© NXP B.V. 2009. All rights reserved.
t
h(SCS_N)
001aaj813
Unit
MHz
ns
ns
ns
ns
ns
ns
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