mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 230

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mt90503

Manufacturer Part Number
mt90503
Description
2048vc Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet

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MT90503
Data Sheet
10.0
Glossary of Terms
AAL0: ATM Adaptation Layer 0. AAL0 is a straight packaging of 48 bytes of data within an ATM cell. AAL0 can be
used to treat either data cells (managed by CPU) or CBR cells (managed by TX/RX SAR).
AAL1: ATM Adaptation Layer 1. AAL1 is used to transport constant bit rate (CBR) data on ATM. The main features
of AAL1 are a cell sequence number that allows the detection of lost cells and a p-byte that allows reconverging of
multi-channel VCs.
AAL5: ATM Adaptation Layer 5. The main feature of AAL5 is a 32-bit CRC at the end of the cell that allows the
detection and correction of errors in the data payload. In this design, AAL5 cells are used uniquely to treat CBR
information.
ATM: Asynchronous Transfer Mode. ATM is a networking standard based on 53-byte cells and is capable of
carrying voice, data and video information simultaneously.
CAS: Channel Associated Signalling. Signalling bits used to indicate the state of the channel.
CBR: Constant Bit Rate. Cells in CBR format are sent out at a regular rate. CBR is applicable to voice channels.
CDV: Cell Delay Variation. When cells arrive on a UTOPIA port, they arrive with a certain delay with respect to
when they were sent. CDV is a measure of how much that delay varies on a VC.
CLP: Cell Loss Priority. A 1-bit field in the ATM cell header that corresponds to the loss priority of a cell; cells with
CLP = 1 can be discarded in a congestion situation.
CNT: Counter. Events in the MT90503 will cause the counter to increment.
CRC: Cyclic Redundancy Check. The CRC is a method of error detection and correction that is applied to a certain
field of data. CRC is an efficient method of error detection because the odds of erroneously detecting a correct
payload are low.
DS1: Digital-Signal Level 1. DS1 is an electrical interface for digital transmissions that contains 24 64-Kbps
channels. The physical interface defined to carry DS1 channels is T1.
E1: E1 is the European equivalent of T1. They are similar with the main difference being E1 runs at 2.048 MHz
instead of 1.544 Mbps, carrying 30 64kbps channels.
ESF: Extended Super-Frame. ESF is a T1 format that defines multiframes as consisting of 24 frames, each one of
which contains 1 byte per channel.
FASTCAS: FASTCAS is not an acronym. It is capitalised in this document because it is a reserved word. FASTCAS
means that multiframe integrity is not respected between the TDM and ATM buses. The TDM data is processed as
soon as it is received, while CAS is sent when it is available.
FIFO: First In, First Out. A FIFO memory is one in which the first byte to have been written into the memory is the
first one to be read from the read port.
GFC: Generic Flow Control. The GFC field is kept in the 4 highest bits of an ATM cell’s header and is used for local
functions (not carried end-to-end). The default value is "0000", meaning that GFC protocol is not enforced.
GPI: General Purpose Input
GPI/O: General Purpose Input or Output
H.100/H.110: A TDM bus standard developed by ECTF to provide backward compatibility to existing TDM buses
with more bandwidth and potential for development.
HEC: Header Error Check. Using the fifth octet in the ATM cell header, ATM equipment may check for an error and
correct the contents of the header. A CRC algorithm allows for single-error correction and multiple-error detection.
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Zarlink Semiconductor Inc.

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