mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 114

• Manufacturer Part Number: mt90503
• Description: 2048vc Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Address: 226h
Label: interrupt2_conf
Reset Value: 0000h
Address: 228h
Label: interrupt1_enable
Reset Value: 0000h
interrupt2_polarity
wheelreg_interrupt1_enable
mainreg_interrupt1_enable
mastreg_interrupt1_enable
miscreg_interrupt1_enable
cpureg_interrupt1_enable
tdmreg_interrupt1_enable
utoreg_interrupt1_enable
clkreg_interrupt1_enable
txreg_interrupt1_enable
rxreg_interrupt1_enable
reserved
Label
Label
Position
15:14
13:0
Bit
Table 56 - Interrupt2 Configuration Register
Table 57 - Interrupt1 Enable Register
Position
Type
RW
RW
Bit
0
1
2
3
4
5
6
7
8
9
Zarlink Semiconductor Inc.
MT90503
Reserved. Must be "0000_0000_0000_00"
Interrupt polarity and output enable. "00"=active low
(open-collector); "01"=active high (open-collector); "10" =
drive low; "11" = drive high. Drive low or drive high means
that the pin's value will not change regardless of internal
interrupts.
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
114
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
Description
Description
Data Sheet