mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 152

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mt90503

Manufacturer Part Number
mt90503
Description
2048vc Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet

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5.5.4
Address: 3ECh
Label: gpio_oe2
Reset Value: 0000h
Address: 400h
Label: control
Reset Value: 0000h
h100_data_loopback
phya_tx_led_oe
phya_rx_led_oe
phyb_tx_led_oe
phyb_rx_led_oe
stream_mode
tdmie_enable
test_status
TDM Registers
global_oe
reserved
reserved
Label
Label
Position
Position
14:5
4:3
Bit
15
Table 143 - GPIO Output Enable2 Register
0
1
2
15:4
Bit
0
1
2
3
Table 144 - TDM Control Register
Type
RW
RW
RW
RW
RW
TS
Type
RW
RW
RW
RW
RW
Zarlink Semiconductor Inc.
MT90503
’0' = ct_d[31:0] forced tri-state; '1' = ct_d[31:0] may be driven.
’0' = no ct_d[31:0] loopback; '1' = ct_d[31:0] loopback. For
test only.
’0' disables TDM process. Should only be set to '1' when
CAM has been programmed
"00" = 32 streams, "01" = 16 streams, "10" = 4 streams, "11"
= reserved. This register is only used for tests: in real
operation, it should be left to "00" (32 streams).
Reserved. Must always be "0000_0000_00"
When '1', all the status bits in the register will be set.
This is OE bit used to drive the corresponding pin
This is OE bit used to drive the corresponding pin
This is OE bit used to drive the corresponding pin
This is OE bit used to drive the corresponding pin
Reserved. Must always be "0000_0000_0000"
152
Description
Description
Data Sheet

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