mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 173

• Manufacturer Part Number: mt90503
• Description: 2048vc Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Address: 824h
Label: adapsrts0_reg2
Reset Value: 0000h
adapsrts0_rx_srts_remote_overflow_i
Address: 826h
Label: adapsrts0_reg3
Reset Value: 0000h
adapsrts0_rx_fnxi_input_select
adapsrts0_rx_srts_local_overflow_ie
adapsrts0_ref_input_select
adapsrts0_aal1_bad_parity_ie
adapsrts0_cell_misinserted_ie
adapsrts0_single_cell_lost_ie
adapsrts0_multi_cell_lost_ie
adapsrts0_timeout_pulse_ie
reserved
reserved
Label
reserved
reserved
Label
e
Table 204 - Adaptive SRTS0 2 Register (continued)
Position
Table 205 - Adaptive SRTS0 3 Register
15:14
13:8
5:0
7:6
Bit
Position
15:9
Bit
1
2
3
4
5
6
7
8
Zarlink Semiconductor Inc.
Type
RW
RW
RO
RO
MT90503
Type
173
RO
IE
IE
IE
IE
IE
IE
IE
IE
In adaptive mode, this field indicates which events the
adapsrts0 block will consider as a timing reference.
Rising edges on the recov_X pins can be used. Cell
arrival events on Clock Recovery VC A or B can be
used. See Table 28, “Source Selection,” on page 89" for
more details.
Reserved. Always read as "00"
In SRTS mode, this selects the fnxi input used in the RX
SRTS block. See Table 28, “Source Selection,” on
page 89" for more details.
Reserved. Always read as "00"
When '1' and the corresponding status bit is '1',
and interrupt will be generated.
When '1' and the corresponding status bit is '1',
and interrupt will be generated.
When '1' and the corresponding status bit is '1',
and interrupt will be generated.
When '1' and the corresponding status bit is '1',
and interrupt will be generated.
Reserved. Always read as "0"
When '1' and the corresponding status bit is '1',
and interrupt will be generated.
When '1' and the corresponding status bit is '1',
and interrupt will be generated.
When '1' and the corresponding status bit is '1',
and interrupt will be generated.
Reserved. Always read as "0000_000"
Description
Description
Data Sheet